Reconfigurable Distributed Arithmetic Based Adaptive Noise Canceller Using Modified NLMS Algorithm

This paper presents an efficient design and implementation of low area, high speed Adaptive filter based on Distributed Arithmetic (DA) Scheme. An enhanced NLMS algorithm has been proposed for the adaptive noise cancellation filter design. The computation speed of the proposed NLMS system is relatively high due to preallocation of memory for variables in enhanced Normalized LMS algorithm.The proposed design is successfully implemented using Matlab Code and Xilinx ISE Design Suit on Spartan 3 based XC 35400 and Spartan 3E based Xc3500e FPGA device. The synthesis report shows a considerable decrease in device utilization percentage and increase in overall speed than the existing design. For 20 tap proposed filter there is 43% reduction in number of slices, 59% reduction in number of flip flops, 24% reduction in number of LUTs used, whereas 54% improvement has been achieved in maximum frequency and 35.14% improvement in minimum period. Whereas for 10 coefficient filter there is 21% increase in maximum frequency and 16.46% decrease in minimum period.